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ATUSS

VISER

Academy of Technical and Art Applied Studies

School of Electrical and Computer Engineering

Programmable Logic Circuits Course code: 111807 | 6 ECTS credits

Basic information
Level of Studies: Undergraduate applied studies
Year of Study: 3
Semester: 6
Requirements: Basic understanding of digitial electronics.
Goal: To introduce students to the properties of programmable logic devices and their application in modern digital systems.
Outcome: At the end of the course, the students will be familiar with the basic principles of digital systems design, simulation, and implementation in programmable logic design.
Contents of the course
Theoretical instruction:
  1. Basic concept of programmable logic. Overview of programmable logic devices (PLD).
  2. Design implementation in programmable PLA, PAL and ROM logic devices.
  3. Features of CPLD and FPGA complex programmable logic devices. Macrocell and logic block architecture. Routing interconnections, delay analysis and programming.
  4. Graphic design methods of combinational logic networks. Hierarchical hardware design.
  5. Implementation examples of complex combinatorial networks. Using expanders for the implementation of quick comparators and adders.
  6. Synchronous logic with global clock. Synchronous flip- flops with multiplexers. Implementation of registers, programmable timers and counters.
  7. Reading the contents of timers and counters during operation. Pulse-width modulation generator.
  8. Examples of synchronous input-output logic. Interface for incremental encoder. Implementation of digital filter with majority logic.
  9. State machine. A binary sequence detector and an arbitrary counting module counter.
  10. AHDL state machine description. Sequential networks analysis. Reverse engineering.
  11. Design description in VHDL. The concept of entities and architecture. Data types.
  12. Concurrent and sequential structures in VHDL. Examples of VHDL description of combinational and sequential logical networks.
  13. Components, functions, and procedures in VHDL.
  14. Structural and hierarchical hardware model in VHDL.
  15. Using mega functions for hardware interfaces design and complex digital systems.
Practical instruction (Problem solving sessions/Lab work/Practical training):
  1. Practical classes are in compliance to the curriculum. Module is in compliance to IEEE/ACM Computing Curriculum: CE2004 Computer Engineering Body of Knowledge: CE-VLS 0-11.
Textbooks and References
  1. D. Prokin, D. Todović, Zbirka zadataka iz Programabilnih logičkih kola, VIŠER, 2007.
  2. D. Prokin, D. Todović, Programabilna logička kola, Priručnik za laboratorijske vežbe, VIŠER, 2018.
  3. M. Prokin, Mikroprocesorska elektronika, Akademska misao, Beograd, 2006.
  4. J. Hamblen, T. Hall, M. Furman Rapid prototyping of digital systems, Springer, 2006.
  5. D. Prokin Elektronske lekcije i interaktivni zadaci u Moodle okruženju
Number of active classes (weekly)
Lectures: 3
Practical classes: 2
Other types of classes: 0
Grading (maximum number of points: 100)
Pre-exam obligations
Points
activities during lectures
5
activities on practial excersises
20
seminary work
20
colloquium
25
Final exam
Points
Written exam
30
Oral exam
0