Requirements:Architecture and organization of computers 1, Architecture and organization of computers 2
Goal:Provide students necessary theoretical and practical knowledge through teaching, laboratory practice about contemporary architecture of micro computer systems and enable practical usage of addopted knoweldge in realization of assymly programs in accordance with the needs and directions of information technology.
Outcome:Students will addopt new knoweledge from the area of contemporary computer architecture and micro computer and enabled to use a unique modern procesor for realization of concrete solution which can be met in practice.
Contents of the course
Central processor: Steering unit CISC and RISC aarchitecture. Advanced architectonic characteristics of 64 bit microprocessors
Vector and superscalar processors. Arithmetical logical unit. State Register. Chargeable cell.
Organization of memory system. Internal structure. Address decoder. Memory addressing. Increase of address space – memory bank.
Memory cycle of enrollment and reading. Specialized memories – DRAM, EEPROM, SRAM and none SRAM.
Cash memories, work principle and aspects of realization. Data maintenance in Cash and RAM memory.
Type of interruption. Vector interruption table.
Definition of priority by peripheral polling sequence, hardware concatenation of interruption by using and interruption controller with certain priorities. Interruption procedure.
Memory and periphery mapping. Periphery addressing.
Parallel and serial U/I Interface, U/I controller of function and data transfer function. Address decoding – selection of gadgets.
DMA controller. Hardware for DMA transfers within periphery. Architecture of DMA controller.
DMA control register. DMA PC controllers.
External memories, RIAD systems.
Support of operational system. Concept of virtual memories.
Instruction for data transfer. Description of assembly instructions and type of addressing for data transfer between CPU register and memory. Description of logical instructions. Instructions for controlling the program flow. Instructions for processing the subprograms. Instructions for interruption processing.
Textbooks and References
Viliam Stolings, Organizacija i arhitektura računara, CET 2014. Prevod osmog izdanja.
S. Obradović, B. Pavić, Priručnik za laboratorijske vežbe - ARM procesor, VISER, Beograd
S. Minić, Informacione tehnologije,2015. Univerzitet u Prištini- K.Mitrovici, Učiteljski fakultet u Prizrenu- Leposaviću